Silicon Labs /EFR32ZG23A010F512GM48 /CMU_S /SYSCLKCTRL

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Interpret as SYSCLKCTRL

31282724232019161512118743000000000000000000000000000000000000000000CLKSEL0 (DIV1)PCLKPRESC0 (DIV1)HCLKPRESC0 (DIV1)RHCLKPRESC

HCLKPRESC=DIV1, RHCLKPRESC=DIV1, PCLKPRESC=DIV1

Description

No Description

Fields

CLKSEL

Clock Select

1 (FSRCO): FSRCO is clocking SYSCLK

2 (HFRCODPLL): HFRCODPLL is clocking SYSCLK

3 (HFXO): HFXO is clocking SYSCLK

4 (CLKIN0): CLKIN0 is clocking SYSCLK

PCLKPRESC

PCLK Prescaler

0 (DIV1): PCLK is HCLK divided by 1

1 (DIV2): PCLK is HCLK divided by 2

HCLKPRESC

HCLK Prescaler

0 (DIV1): HCLK is SYSCLK divided by 1

1 (DIV2): HCLK is SYSCLK divided by 2

3 (DIV4): HCLK is SYSCLK divided by 4

7 (DIV8): HCLK is SYSCLK divided by 8

15 (DIV16): HCLK is SYSCLK divided by 16

RHCLKPRESC

Radio HCLK Prescaler

0 (DIV1): Radio HCLK is SYSCLK divided by 1

1 (DIV2): Radio HCLK is SYSCLK divided by 2

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